Switched capacitor networks, also known as charge pumps, are commonly used to multiply or divide an input voltage Vin. The output voltage Vout is proportional to Vin, such as 2×, 3×, ½×, ⅓×, etc. The load connected to Vout may be a conventional resistive type load, a voltage regulator (e.g., a buck regulator), or any other type of load.
One problem with such switched capacitor DC/DC converters is that the input voltage is directly coupled to the capacitors. Upon start-up of the system, when Vin is first applied, the in-rush current into the capacitors before reaching steady state can easily exceed 1000 A for a few nanoseconds with a low impedance interconnection. This imposes various constraints and risks on the design.
FIG. 1 illustrates a conventional 2:1 switched capacitor converter 10 which outputs a voltage Vout that is approximately one-half of the input voltage Vin. During steady state operation, the FETs Q1-Q4 are switched, as shown in FIG. 2, to cyclically charge and discharge capacitor C2, called a flying capacitor. The body diodes of the FETs are shown. The capacitor C2 is repeatedly charged to Vin/2 when connected across the capacitor C1, and the charge is transferred to the capacitor C3 (and the load 12) when connected across the capacitor C3. The capacitors C1 and C3 are initially charged by Vin at start-up, where the node of C1 and C3 is at Vin/2. Typically, capacitors are connected external to any controller package due to their large size. The switches Q1-Q4 may also be external to the package if the currents are high. The input voltage Vin is directly connected to the top terminal of the FET Q1 and the capacitor C1.
The 2:1 switched capacitor converter can properly operate without capacitor C1. In such a case, when the FETs Q1 and Q3 are on, the capacitors C2 and C3 are charged by Vin in series. When FETs Q2 and Q4 are on, the capacitors C2 and C3 are in parallel. This forces the capacitor C2 and C3 voltages to be very close to each other at about Vin/2.
FIG. 3 illustrates how, upon the Vin power supply powering up at time T0, when the capacitors C1-C3 have a zero initial voltage, the in-rush current can easily exceed 1000 A, depending on any parasitic resistances in the path. The high current may only last less than 1 microsecond but can easily exceed the FETs' safe operating current and needs to be taken into account in the design. The output voltage Vout only reaches its steady state voltage after the capacitors C1, C2, and C3 are fully charged and the switches Q1-Q4 are controlled as shown in FIG. 2. The Vout waveform shows some ringing after the in-rush current.
In a fault condition, such as the capacitor C3 becoming a short circuit, since there is no inductor in the switched capacitor circuit to limit current, the input in-rush current can rise up quickly to a very high level, causing FET failure and system damage.
What is needed is a complete circuit for controlling a switched capacitor DC/DC converter, where the in-rush current is reduced. The circuit should also detect faults during operation and take appropriate safety measures.